TI Sitara AM62x Family
Production-grade camera drivers for AM62x (AM625 / AM623 / AM620 / AM625SIP), supporting single or quad-camera setups via Cadence CSI2RX + D-PHY.
- Support for AM625 / AM623 / AM620 / AM625SIP
- Cadence CSI2RX + D-PHY Support
- V4L2 Async Sub-device Registration
- Cost-Effective Vision Solutions
MIPI CSI-2 Driver Operation
The AM62x family provides a single Cadence CSI2RX + D-PHY receiver supporting 1–4 data-lanes, with wire-rate up to 2.5 Gbps per lane (though actual link-frequency depends on board configuration and sensor). Sensor drivers register as V4L2 async sub-devices; the media-controller binds them to the CSI-bridge; device-tree overlays define the lane-mapping. Power/reset is managed via regulators (e.g. TPS62825) and GPIOs. This setup supports RAW or YUV capture; DMA-based output is sent to memory or further processing pipeline. Developers have demonstrated multi-camera support (e.g. 4× IMX219 cameras on a V3Link fusion board) using the multi-stream patches to CSI2RX. Hence, AM62x is suitable for cost-sensitive, low-to-mid-range vision applications (e.g. single or multiple 1080p / moderate-resolution cameras).
